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Yuning Liang’s Painstaking Push to Make the RISC-V PC a Reality

Yuning Liang’s Painstaking Push to Make the RISC-V PC a Reality
by Jonah McLeod on 09-24-2025 at 10:00 am

Embedded World Germany

At Embedded World 2025 in Nuremberg, Germany, on March 11, 2025, Yuning Liang, DeepComputing Founder and CEO walked onto the stage with a mischievous smile and a challenge. “What’s the hardest product to make?” he asked rhetorically. “A laptop. It’s bloody hard… but we did it. You can swap the motherboard, you can upgrade, you can’t… Read More


SiFive Launches Second-Generation Intelligence Family of RISC-V Cores

SiFive Launches Second-Generation Intelligence Family of RISC-V Cores
by Kalar Rajendiran on 09-18-2025 at 6:00 am

SiFive 2nd Gen Intelligence Family

SiFive, founded by the original creators of the RISC-V instruction set, has become the leading independent supplier of RISC-V processor IP. More than two billion devices already incorporate SiFive designs, ranging from camera controllers and SSDs to smartphones and automotive systems. The company no longer sells its own chips,… Read More


Beyond Von Neumann: Toward a Unified Deterministic Architecture

Beyond Von Neumann: Toward a Unified Deterministic Architecture
by Admin on 09-04-2025 at 6:00 am

Beyond Von Neumann

By Thang Tran

For more than half a century, the foundations of computing have stood on a single architecture: the Von Neumann or Harvard model. Nearly all modern chips—CPUs, GPUs, and even many specialized accelerators—rely on some variant of this design. Over time, the industry has layered on complexity and specialization to… Read More


Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs

Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs
by Kalar Rajendiran on 09-01-2025 at 10:00 am

Hot Chips Logo 2025

For decades, high-performance CPU design has been dominated by traditional out-of-order (OOO) execution architectures. Giants like Intel, Arm, and AMD have refined this approach into an industry standard—balancing performance and complexity through increasingly sophisticated schedulers, speculation, and runtime … Read More


Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status Quo

Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status Quo
by Jonah McLeod on 08-31-2025 at 10:00 am

Hot Chips Logo 2025

At Hot Chips 2025, Philippe Sauter of ETH Zürich presented Basilisk, a project that may redefine what’s possible with open-source hardware. Basilisk is a 34 mm² RISC-V SoC fabricated at IHP Microelectronics on its open-source 130nm BiCMOS process in Germany. Basilisk, named after the Greco-Roman mythical creature known… Read More


Can RISC-V Help Recast the DPU Race?

Can RISC-V Help Recast the DPU Race?
by Jonah McLeod on 08-26-2025 at 10:00 am

Can RISC V Help Qualcomm

ARM’s Quiet Coup in DPUs

The datacenter is usually framed as a contest between CPUs (x86, ARM, RISC-V) and GPUs (NVIDIA, AMD, custom ASICs). But beneath those high-profile battles, another silent revolution has played out: ARM quietly displaced Intel and AMD in the Data Processing Unit (DPU) market.

DPUs — also called SmartNICs… Read More


What XiangShan Got Right—And What It Didn’t Dare Try

What XiangShan Got Right—And What It Didn’t Dare Try
by Jonah McLeod on 08-12-2025 at 6:00 am

XiangShan

An Open ISA, a Closed Mindset — Predictive Execution Charts a New Path

The RISC-V revolution was never just about open instruction sets. It was a rare opportunity to break free from the legacy assumptions embedded in every generation of CPU design. For decades, architectural decisions have been constrained by proprietary patents,… Read More


Podcast EP294: An Overview of the Momentum and Breadth of the RISC-V Movement with Andrea Gallo

Podcast EP294: An Overview of the Momentum and Breadth of the RISC-V Movement with Andrea Gallo
by Daniel Nenni on 06-27-2025 at 10:00 am

Dan is joined by Andrea Gallo, CEO of RISC-V International, the non-profit home of the RISC-V instruction set architecture standard, related specifications, and stakeholder community. Prior to joining RISC-V International, Gallo worked in leadership roles at Linaro for over a decade. He built Linaro’s server engineering… Read More


Andes Technology: Powering the Full Spectrum – from Embedded Control to AI and Beyond

Andes Technology: Powering the Full Spectrum – from Embedded Control to AI and Beyond
by Kalar Rajendiran on 05-27-2025 at 6:00 am

Overview of Andes Product Categories

As the computing industry seeks more flexible, scalable, and open hardware architectures, RISC-V has emerged as a compelling alternative to proprietary instruction set architectures. At the forefront of this revolution stands Andes Technology, offering a comprehensive lineup of RISC-V processor solutions that go far beyond… Read More


From All-in-One IP to Cervell™: How Semidynamics Reimagined AI Compute with RISC-V

From All-in-One IP to Cervell™: How Semidynamics Reimagined AI Compute with RISC-V
by Kalar Rajendiran on 05-26-2025 at 6:00 am

Started with a look at CPU

In an era where artificial intelligence workloads are growing in scale, complexity, and diversity, chipmakers are facing increasing pressure to deliver solutions that are not only fast, but also flexible and programmable. Semidynamics recently announced Cervell™, a fully programmable Neural Processing Unit (NPU) designedRead More